www.eecatalog.com/pcie Board-to-Board • 21
CONTACT INFORMATION
Innovative Integration
Innovative Integration
2390 Ward Avenue
Simi Valley, CA 93065
USA
805-578-4260 Telephone
805-578-4225 Fax
sales@innovative-dsp.com
www.innovative-dsp.com
V Ruggedization Levels for Wide Temperature Operation
Adapters for VPX, Compact PCI, desktop PCI and
cabled PCI Express systems
TECHNICAL SPECS
V Available XMC carrier adapters offer conduction
& convection cooling & are available for a range
of interfaces including Desktop PCI, Desktop PCI
Express, Cabled PCI Express, CompactPCI, & PXI/PXI
Express.
V Extremely versatile, easily adapted for use in virtu-
ally any type of system.
The X6-RX is also readily installed into Innovative
Integration’s eInstrument Embedded PC, SBC-ComEx
Single-Board Computer, & Andale Data Loggers.
V PCI gen 2 to 24 Megabytes per second.
200 fS clock jitter
V 15 watt nominal power dissapation!
V Military rugged versions available.
AVAILABILITY
Shipping
APPLICATION AREAS
V Wireless Receiver
V WLAN, WCDMA, WiMAX front end
V RADAR
V Medical Imaging
V High Speed Data Recording and Playback
V IP Development
X6-RX
OS Support: Windows, Linux,and VXWorks/Wind River
Bus Interface: natively xmc/pmc adapters to VPX, cPCI, PCI, PCI
Express
The X6-RX is a flexible receiver that integrates IF digi-
tizing with signal processing on a PMC IO module. Up to
24 configurable receiver channels with a powerful Xilinx
Virtex 6 FPGA signal processing core, & high perfor-
mance PCI Express/PCI host interface. With the X6-RX,
IF recorders can log both the digitized raw data & chan-
nels real-time sustaining rates over 2 GB/s.
The X6-RX features four, 16-bit 160 MSPS A/Ds with dual
digital downconverters (DDC). IF frequencies of up to
300 MHz are supported. The sample clock is from either
a low-jitter PLL or external input. Multiple cards can be
synchronized for sampling & downconversion.
A Xilinx Virtex6 SX315T (LX240T at initial release) with 4
banks of 128MB DRAM provide a very high performance
DSP core with over 2000 MACs (SX315T). The close
integration of the analog IO, memory & host interface
with the FPGA enables real-time signal processing at
extremely high rates.
Onboard DDC ASIC device, connected directly to the
FPGA, provides up to 24 narrowb &/or 8 wideb & channels
with input from two A/D channels. The DDC performs
complex or real downconversion, with flexible controls
for mixing, filtering, decimation, output formats & data
rates. Channels can be synchronized to support beam
forming or frequency hopped systems.
Power is less than 15W for typical operation. VITA 20
conduction cooling is used with a heat-spreader & sink
are Ruggedization levels for wide-temperature operation
& conformal coating are supported.
FEATURES & BENEFITS
V Four 160 MSPS, 16-bit A/D channels
Down-Converter ASIC supporting up to 24 Narrow-
band or 8 Wideband Channels
+/-1V, AC-Coupled, 50 ohm, SMA inputs
V Xilinx Virtex6 SX315T/SX475T or LX240T
4 Banks of 128MB DRAM
Ultra-low jitter programmable clock
V x8 PCI Express Gen2, providing 2 GB/s sustained
transfer rates
PCI 32-bit, 66 MHz with P4 to Host card
V PMC/XMC Module (75x150 mm)
15W typical
Conduction Cooling per VITA 20
Boards / Hardware
Boards / Hardware
Manymanuals.com
Manymanuals.de
Manymanuals.fr
Manymanuals.it
Manymanuals.pl
Manymanuals.cz
Manymanuals.es
Manymanuals-pt.com
Commenti su questo manuale